1. Field of the Invention
The present invention relates to a solid-state imaging device, and more particularly, to a solid-state imaging device which can reduce the number of mounted transistors, which has a high planar filling rate of pixels, and which can collect light with a high efficiency.
2. Description of the Related Art
In recent years, electronic devices such as digital still cameras or camcorders for capturing an image of a subject using a solid-state imaging device and forming an image were more and more spread. CCD (Charge Coupled Device) image sensors or CMOS (Complementary Metal Oxide Semiconductor) image sensors were known as such solid-state imaging devices. They are all called image sensors. The image sensors are premised on techniques using a pixel as a unit.
The techniques using a pixel as a unit are applied to a display side as well as an image-capturing side. Such techniques using a pixel as a unit are disclosed in Japanese Patent No. 2600250 (Patent Document 1), JP-A-2004-2153 (Patent Document 2), JP-A-2005-150463 (Patent Document 3), JP-A-2006-165567 (Patent Document 4), JP-A-2006-54276 (Patent Document 5), IEEE Workshop on CCDs and Advanced Image Sensors, pp. 1-4 (2005), by J. Adkisson, et al. (Non-Patent Document 1), and Technical Research Report of the Institute of Electronics, Information and Communication Engineers Vol. 104, No. 66 (20040513) pp. 51-56, by Keiji Mabuchi (Non-Patent Document 2).